Modelo computacional de un modulador ∑-∆ de 2° orden para la generación de señales de prueba en circuitos integrados analógicos
This article describes the computational model of a 2nd order Σ-Δ modulator used to generate Pulse-density Modulated (PDM) signals. Such a model was required as part of a previous work carried by one of the authors in order to perform design verification of analog integrated circuits. For this purpo...
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Autores principales: | , |
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Formato: | Digital |
Lenguaje: | spa |
Publicado: |
UNIVERSIDAD ANTONIO NARIÑO
2014
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Acceso en línea: | https://revistas.uan.edu.co/index.php/ingeuan/article/view/383 |
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Computer model of a Σ-Δ modulator 2nd order for generating testing signals in analog integrated circuits
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Publicado 2014
Computer model of a Σ-Δ modulator 2nd order for generating testing signals in analog integrated circuits
info:eu-repo/semantics/article