Modelo computacional de un modulador ∑-∆ de 2° orden para la generación de señales de prueba en circuitos integrados analógicos

This article describes the computational model of a 2nd order Σ-Δ modulator used to generate Pulse-density Modulated (PDM) signals. Such a model was required as part of a previous work carried by one of the authors in order to perform design verification of analog integrated circuits. For this purpo...

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Bibliographic Details

Main Authors:	Simancas, José G., Ortiz, José C.
Format:	Digital
Language:	spa
Published:	UNIVERSIDAD ANTONIO NARIÑO 2014
Subjects:	Modulador ∑-∆ señales PDM modelo computacional filtro pasa-bajas verificación de circuitos integrados analógicos Σ-Δ modulator PDM signals computational model low pass filter verification of analog integrated circuits
Online Access:	https://revistas.uan.edu.co/index.php/ingeuan/article/view/383
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