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  1. Computer model of a Σ-Δ modulator 2nd order for generating testing signals in analog integrated circuits
    Published 2014

    Computer model of a Σ-Δ modulator 2nd order for generating testing signals in analog integrated circuits Authors: Simancas, José G., Ortiz, José C.

    info:eu-repo/semantics/article

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  2. Computer model of a Σ-Δ modulator 2nd order for generating testing signals in analog integrated circuits
    Published 2021

    Computer model of a Σ-Δ modulator 2nd order for generating testing signals in analog integrated circuits Authors: Simancas, José G., Ortiz, José C.

    info:eu-repo/semantics/publishedVersion

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    2
  3. Modelo computacional de un modulador ∑-∆ de 2° orden para la generación de señales de prueba en circuitos integrados analógicos
    Published 2014

    Modelo computacional de un modulador ∑-∆ de 2° orden para la generación de señales de prueba en circuitos integrados analógicos Authors: Simancas, José G., Ortiz, José C.

    Digital

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