Simancas, J. G., & Ortiz, J. C. (2014). Computer model of a Σ-Δ modulator 2nd order for generating testing signals in analog integrated circuits. UNIVERSIDAD ANTONIO NARIÑO.
Cita Chicago Style (17a ed.)Simancas, José G., y José C. Ortiz. Computer Model of a Σ-Δ Modulator 2nd Order for Generating Testing Signals in Analog Integrated Circuits. UNIVERSIDAD ANTONIO NARIÑO, 2014.
Cita MLA (9a ed.)Simancas, José G., y José C. Ortiz. Computer Model of a Σ-Δ Modulator 2nd Order for Generating Testing Signals in Analog Integrated Circuits. UNIVERSIDAD ANTONIO NARIÑO, 2014.