Computer model of a Σ-Δ modulator 2nd order for generating testing signals in analog integrated circuits
This article describes the computational model of a 2nd order Σ-Δ modulator used to generate Pulse-density Modulated (PDM) signals. Such a model was required as part of a previous work carried by one of the authors in order to perform design verification of analog integrated circuits. For this purpo...
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UNIVERSIDAD ANTONIO NARIÑO
2014
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| Online Access: | https://revistas.uan.edu.co/index.php/ingeuan/article/view/383 https://repositorio.uan.edu.co/handle/123456789/10452 |
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| author | Simancas, José G. Ortiz, José C. |
| author_facet | Simancas, José G. Ortiz, José C. |
| author_sort | Simancas, José G. |
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| description | This article describes the computational model of a 2nd order Σ-Δ modulator used to generate Pulse-density Modulated (PDM) signals. Such a model was required as part of a previous work carried by one of the authors in order to perform design verification of analog integrated circuits. For this purpose, the theoretical performance of the Σ-Δ modulators was studied, and the mathematical model of the latter was performed using finite difference equations under coherent sampling. After this, the modulator was implemented using Matlab™ mathematical model. Then, it was verified that it behaved according to the theory of Σ-Δ modulation by performing simulations. As this work is complementary to a previously developed one, as already mentioned, we were careful that the stimuli encoded in the PDM signals was recoverable through a low pass filtering. Therefore, such filter was implemented in Matlab™, and after that we applied the PDM signals to its input. The result was the successful recovery of the stimuli, but with remaining noise outside and within the band of interest. It was evident that filtering was not able to remove the noise completely. Although |
| format | info:eu-repo/semantics/article |
| id | repositorio.uan.edu.co-123456789-10452 |
| institution | Repositorio Digital UAN |
| language | spa |
| publishDate | 2014 |
| publisher | UNIVERSIDAD ANTONIO NARIÑO |
| record_format | dspace |
| spelling | repositorio.uan.edu.co-123456789-104522024-10-14T03:49:56Z Computer model of a Σ-Δ modulator 2nd order for generating testing signals in analog integrated circuits Modelo computacional de un modulador ∑-∆ de 2° orden para la generación de señales de prueba en circuitos integrados analógicos Simancas, José G. Ortiz, José C. Modulador ∑-∆ señales PDM modelo computacional filtro pasa-bajas verificación de circuitos integrados analógicos Σ-Δ modulator PDM signals computational model low pass filter verification of analog integrated circuits This article describes the computational model of a 2nd order Σ-Δ modulator used to generate Pulse-density Modulated (PDM) signals. Such a model was required as part of a previous work carried by one of the authors in order to perform design verification of analog integrated circuits. For this purpose, the theoretical performance of the Σ-Δ modulators was studied, and the mathematical model of the latter was performed using finite difference equations under coherent sampling. After this, the modulator was implemented using Matlab™ mathematical model. Then, it was verified that it behaved according to the theory of Σ-Δ modulation by performing simulations. As this work is complementary to a previously developed one, as already mentioned, we were careful that the stimuli encoded in the PDM signals was recoverable through a low pass filtering. Therefore, such filter was implemented in Matlab™, and after that we applied the PDM signals to its input. The result was the successful recovery of the stimuli, but with remaining noise outside and within the band of interest. It was evident that filtering was not able to remove the noise completely. Although En este artículo se realiza la modelo computacional de un modulador ∑-∆ de 2 ° orden para la generación de las señales Pulse Density Modulated (PDM) (modulado por densidad de pulso) requerido en el diseño propuesto por uno de los autores en un trabajo anterior que trata sobre la verificación del funcionamiento de circuitos integrados analógicos. Para este propósito, se estudia el funcionamiento teórico de los moduladores ∑-∆, y se realiza el modelo matemático de este último usando las ecuaciones en diferencias finitas en el marco del muestreo coherente. Luego de esto, se codifica en Matlab™ el modelo matemático y se verifica que tal modelo se comporta conforma a la teoría de la modulación ∑-∆ mediante simulaciones. Debido a que este trabajo es complementario a uno desarrollado con anterioridad, como ya se mencionó se debe verificar que los estímulos que están codificados en las señales PDM sean recuperables mediante un filtro pasa-bajas, por tanto, se implementó el filtro en Matlab™ y se le aplico a las señales PDM. El resultado fue la correcta recuperación de los estímulos pero con un ruido remanente (fuera y dentro de la banda de interés) no eliminable mediante filtrado que se puede considerar una desventaja, pero que es tolerable. 2014-12-20 2024-10-10T02:25:13Z 2024-10-10T02:25:13Z info:eu-repo/semantics/article info:eu-repo/semantics/publishedVersion http://purl.org/coar/resource_type/c_6501 http://purl.org/coar/version/c_970fb48d4fbd8a85 https://revistas.uan.edu.co/index.php/ingeuan/article/view/383 https://repositorio.uan.edu.co/handle/123456789/10452 spa https://revistas.uan.edu.co/index.php/ingeuan/article/view/383/321 https://creativecommons.org/licenses/by-nc-sa/4.0 http://purl.org/coar/access_right/c_abf2 application/pdf UNIVERSIDAD ANTONIO NARIÑO INGE@UAN - TENDENCIAS EN LA INGENIERÍA; Vol. 5 Núm. 9 (2014) 2346-1446 2145-0935 |
| spellingShingle | Modulador ∑-∆ señales PDM modelo computacional filtro pasa-bajas verificación de circuitos integrados analógicos Σ-Δ modulator PDM signals computational model low pass filter verification of analog integrated circuits Simancas, José G. Ortiz, José C. Computer model of a Σ-Δ modulator 2nd order for generating testing signals in analog integrated circuits |
| title | Computer model of a Σ-Δ modulator 2nd order for generating testing signals in analog integrated circuits |
| title_full | Computer model of a Σ-Δ modulator 2nd order for generating testing signals in analog integrated circuits |
| title_fullStr | Computer model of a Σ-Δ modulator 2nd order for generating testing signals in analog integrated circuits |
| title_full_unstemmed | Computer model of a Σ-Δ modulator 2nd order for generating testing signals in analog integrated circuits |
| title_short | Computer model of a Σ-Δ modulator 2nd order for generating testing signals in analog integrated circuits |
| title_sort | computer model of a σ δ modulator 2nd order for generating testing signals in analog integrated circuits |
| topic | Modulador ∑-∆ señales PDM modelo computacional filtro pasa-bajas verificación de circuitos integrados analógicos Σ-Δ modulator PDM signals computational model low pass filter verification of analog integrated circuits |
| url | https://revistas.uan.edu.co/index.php/ingeuan/article/view/383 https://repositorio.uan.edu.co/handle/123456789/10452 |
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